Ceramics, for example, alumina (Al.sub.2 O.sub.3) aluminum nitride (AlN), and silicon nitride (Si.sub.3 N.sub.4), have hitherto been used as an electrical insulating substrate for semiconductor devices. In this case, a circuit board for semiconductor IC using the above substrate has generally been prepared by forming and laminating a metallized circuit, composed mainly of tungsten (W) or molybdenum (Mo) or a metallized circuit composed mainly of copper (Cu), on the above substrate. The above ceramics used as the substrate possesses excellent electrical insulting properties and mechanical strength and in addition has high thermal conductivity. The thermal conductivities of alumina (Al.sub.2 O.sub.3), aluminum nitride (AlN), and silicon nitride (Si.sub.3 N.sub.4) are approximately 17 W/m.multidot.K, 170 W/m.multidot.K, and 60 W/m.multidot.K, respectively. Among them, aluminum nitride has electrical insulating properties comparable to alumina and silicon nitride and, as described above, has the highest thermal conductivity. By virtue of these properties, aluminum nitride has received the greatest attention as a substrate for circuit boards. Further, the average coefficient of thermal expansion of aluminum nitride, when the temperature is raised from room temperature to the brazing temperature of silver (about 800.degree. C.), is as small as 5.5.times.10.sup.-6 /.degree. C. Therefore, aluminum nitride is highly compatible with an IC chip of a silicon semiconductor (coefficient of thermal expansion 4.0.times.10.sup.-6 /.degree. C). Although the thermal conductivity of silicon nitride is lower than that of aluminum nitride, silicon nitride has a coefficient of thermal expansion more close to the Si semiconductor than aluminum nitride and possesses superior mechanical strength. For this reason, silicon nitride has recently begun to be utilized as a substrate for a circuit board by reducing the thickness of the silicon nitride substrate to control the heat resistance. However, ceramics, including aluminum nitride, commonly used as the substrate have low coefficient of thermal expansion. In particular, when a circuit composed mainly of copper (coefficient of thermal expansion 16.7.times.10.sup.-6 /.degree. C.) is formed on the substrate, the compatibility of copper with the substrate is so low that the ceramic substrate is likely to be broken due to thermal stress in the joined interface created in the stage of joining of the circuit to the substrate and mounting of the assembly by incorporation and in the stage of actual use as the circuit board. For this reason, in joining the circuit to the ceramic substrate, various interposing layers have generally been provided between the circuit and the ceramic substrate in order to relax the thermal stress.
For example, Japanese Patent Publication No. 34908/1990 introduces a circuit board comprising multiple layers, each comprising silver (Ag) or copper (Cu) as a main component and a group IVa metal as an active metal, interposed between a ceramic substrate and a copper conductor layer. In the formation of a joined structure comprising the above interposing layer, however, the relaxation of the thermal stress created between copper and the ceramic is unsatisfactory particularly in the case of a large board. Therefore, what is required is to interpose an interposing layer appropriate for satisfactorily relaxing the thermal stress created between copper and the ceramic.
For this reason, in joining a ceramic substrate to a metallic member such as a lead frame, having a considerably larger coefficient of thermal expansion than that of the ceramic substrate, a method has generally been used which comprises first providing a high-melting metallizing layer comprising a high-melting metal (i.e., refractory metal), such as W or Mo, on the surface of a ceramic substrate and then joining the above metallic member on the high-melting metallizing layer with the aid of a conventional Ag--Cu-base silver brazing material. In this case, a layer comprising the high-melting metal and the conventional silver brazing material corresponds to the above-described interposing layer. For example, Japanese Patent Laid-Open No. 289950/1988 discloses a joined structure comprising a lead frame of oxygen-free copper having high thermal conductivity and thermal impact resistance joined to a high-melting metallizing layer of W provided on an aluminum nitride substrate (see FIGS. 1 and 2 of the same publication). According to the same publication, in joining the lead frame of oxygen-free copper to the high-melting metallizing layer of W, an Ni layer is previously formed between the high-melting metallizing layer and the lead frame in order to improve the wettability therebetween, and joining is then carried out using this layer as an interposing layer by silver brazing.
In this type of products, Kovar has hitherto been used as the lead frame.
As described above, however, use of the lead frame of soft oxygen-free copper instead of the lead frame of Kovar can relax the thermal stress created in the joining interface at the time of brazing as compared the prior art.
Even in the above method, use of the member as a large circuit board at a high power increases the thermal stress, often leading to breaking of the substrate.
Further, for example, methods for joining a metallic member of copper to an aluminum nitride substrate without using the conventional Ag--Cu-based silver brazing material have also been studied. One of them is the so-called DBC (direct bonding copper) method. This method utilizes an eutectic reaction of a layer of an oxide of copper, present on the surface of the metallic member of copper, with copper. For example, Japanese Patent Laid-Open No. 40404/1984 or "Erekutoronikusu Seramikkusu (Electronics Ceramics)," November, 1988, pp. 17-21 discloses the summary of this method. According to the disclosure, at the outset, on the surface of a substrate of an aluminum nitride sintered body is formed a layer of an oxide of aluminum/rare earth element/alkaline earth element used as a sintering aid for the substrate, or an oxide layer composed mainly of the sintered body. Subsequently, a metallic member of copper is put on the above layer, and the assembly is heated in an oxygen-containing atmosphere at a temperature of the eutectic point of copper and a copper oxide Cu.sub.2 O to the melting point of copper to join the metallic member to the above layer. A similar method has been introduced by Japanese Patent Laid-Open No. 32343/1985. According to the description of this publication, an eutectic layer of a copper alloy containing an active metal, such as a group IVa element metal, is interposed between a member of copper and an aluminum nitride substrate to join the two materials to each other. In this case, fine holes are likely to be created in the joined interface of the copper member and the aluminum nitride substrate. On the other hand, since the interposing layer is thin, the interposing layer per se cannot satisfactorily relax the thermal stress. For this reason, the thermal stress is likely to concentrate on the hole portion, leading to cracking in the hole portion.
In the above joining method, as can be seen from FIG. 4 of the above literature "Erekutoronikusu Seramikkusu (Electronics Ceramics)," a variation in joining strength is likely to become large unless the thickness of the oxide layer on the aluminum nitride substrate is regulated within a narrow range. Further, since the interposing layer is thin, the thermal stress created due to a difference in coefficient of thermal expansion between copper and the aluminum nitride substrate cannot be relaxed. This is likely to cause breaking of the substrate in its portion around the joined interface. This unfavorable phenomenon becomes more significant with increasing the size of the substrate. Further, joining other member onto the above member by soldering results in oxidation of the surface of the copper member, making it necessary for the surface to be subjected to abrasive finishing. In the above method wherein an eutectic layer of a copper alloy containing an active metal is interposed, fine holes are likely to be created in the joined interface of the copper member and the aluminum nitride substrate. In this case, since the interposing layer is thin, cracking is likely to be created in the hole portion. Japanese Patent Laid-Open No. 152461/1993 also discloses a member comprising a copper circuit provided on a ceramic substrate. The joined structure comprises a thin interposing layer of an active metal and a copper circuit sheet with a step formed on the outer peripheral end portion thereof. The above publication describes that this joined structure can relax the thermal stress concentrated on the outer peripheral end portion of the joined portion. Also in this structure, however, the thickness of the interposing layer is so small that the relaxation of the thermal stress created in the joined interface is unsatisfactory.
Japanese Patent Laid-Open No. 55271/1989 discloses a board comprising an aluminum nitride substrate, a high-melting metallizing layer of W provided on the aluminum nitride substrate, a metallizing layer, comprising as a main component at least one member selected from the group consisting of silver, copper, and aluminum, having a thickness of not less than 1 .mu.m provided on the high-melting metallizing layer, and a copper sheet joined thereto through an interposing layer of a solder or a silver brazing material. This publication describes that the joined structure can significantly improve the strength of joining between the substrate and the copper sheet.
Japanese Patent Laid-Open No. 69672/1997 discloses a copper circuit-joined board comprising a silicon nitride ceramic substrate, with a thermal conductivity of not less than 60 W/m.multidot.K, having thereon a brazing material layer containing an active metal of a group IVa metal or the like or a high-melting metallizing layer. In this case, in order to control the heat resistance during actual use by reducing the thickness of the substrate, the formulation of the components added and the degree of crystallization of the grain boundary phase are reexamined to improve the thermal conductivity and to improve the mechanical strength and toughness. The above publication describes that this can provide a copper circuit-joined board excellent also in thermal shock resistance. In joined structures as shown in FIG. 1 of Japanese Patent Laid-Open No. 55271/1989 and FIGS. 1, 3, and 8 of Japanese Patent Laid-Open No. 69672/1997, the thermal stress is likely to concentrate in the joined interface of the outer peripheral end portion of the interposing layer. This tends to create warpage of the copper conductor layer, and, when the size of the substrate is large, cracking is likely to occur on the substrate side in its portion corresponding to the warped portion.
As described above, various attempts have been made to join a metallic member comprising copper as a main component to the substrate through an interposing layer. In this connection, some problems as described above should be solved. Among semiconductor modules comprising a copper conductor circuit provided on the ceramic substrate intended in the present invention, particularly high-output modules (hereinafter referred to as "high-power modules") have a large substrate size. Therefore, solving the above problems has been a task necessary for practical use for many years.
The present inventors have previously proposed an improved joined structure that can solve several problems as described above with respect to ceramic circuit boards used in high-power modules (Japanese Patent Laid-Open No. 27516611997). This joined structure comprises a high-melting metallizing layer of W, Mo or the like, an interposing layer of a low-melting metal comprising as a main component at least one member selected from the group consisting of Ni, Fe, and Cu, and a copper conductor layer in that order from the ceramic substrate side. In this case, the high-melting metallizing layer functions to relax the thermal stress created by the difference in coefficient of thermal expansion between aluminum nitride and copper, while the interposing layer functions to improve the wettability between the high-melting metallizing layer and copper during joining. This joined structure is different from the joined structure described in Japanese Patent Laid-Open No. 55271/1989 in that the conventional brazing material layer of silver brazing material, solder or the like is absent in the joined portion. Since the brazing material layer is absent, unlike the joined structure containing the brazing material layer as described in Japanese Patent Laid-Open No. 55271/1989, the warpage of the copper sheet does not occur. Further, various problems involved in the DBC method, wherein joining is carried out through a relatively thin joining layer formed of an eutectic phase, containing an active metal, or a brazing material, have been substantially eliminated.
In the same application, the present inventors have further proposed the following preferred joined structures. The first preferred joined structure is such that, in the above basic structure, the length and width in the planar direction of the conductor layer in the joined interface of the conductor layer and the interposing layer are shorter than those of the interposing layer provided just under the conductor layer. The second preferred joined structure is such that, in the above basic structure, the angle of the side of the conductor layer to the top surface of the interposing layer provided just under the conductor layer is not more than 80.degree.. The effect, attained by the adoption of the above structures, that has been found to be advantageous for practical use, is mainly the avoidance of the discharge phenomenon created between the substrate and the conductor layer at the time of the energization of the conductor layer.
Thereafter, the present inventors have made a confirmative experiment on further practical effects of the above preferred joined structures. As a result, it has been found that, in addition to the above effect, these joined structures have the effect of relaxing the thermal stress. For example, structures shown in drawings of Japanese Patent Laid-Open No. 55271/1989 and Japanese Patent Laid-Open No. 69672/1997 have been found to eliminate a problem that, in particular, a larger size of the substrate results in higher concentration of the thermal stress on the outer peripheral end portion of the substrate, leading to warpage of the conductor layer or cracking of the substrate. It has also been found that, even when the interposing layer includes the brazing material layer as described before, the formation of the above basic structure can solve the same problem. The present inventors have made further studies and have proposed, in addition to the first and second basic joined structures, the formation of an outer layer, comprising Ni as a main component, on the outer peripheral surface of the conductor layer and the interposing layer (Japanese Patent Application No. 134912/1997) as the third basic joined structure which can get higher thermal stress relaxing effect. This basic joined structure can add the effect of dispersing the thermal stress in the outer layer, realizing a module having higher reliability.
In the field of high-power modules, however, an ever-increasing demand for a further reduction in size in addition to an increase in capacity is expected in the future. For this reason, a joined structure, based on the above basic joined structure, having a smaller size and higher integration density has been desired in the art. Therefore, a module board which has been desired to appear is a high-capacity module board comprising joining units laminated on top of one another, the number of joining units being larger than that in the prior art. The joining units each comprise a joined structure comprising a combination of a ceramic substrate layer having excellent thermal conductivity and electrical insulating properties with a conductor layer having excellent electrical conductivity. In view of the above situation, it is an object of the present invention to provide a copper circuit-joined board comprising one lamination unit or two or more lamination units joined to each other or one another, each lamination unit being a basic structure comprising copper joined onto a ceramic substrate, especially a copper circuit-joined board, having high reliability unattainable by the prior art technique, for high-power modules.